Outlook and Challenges for Ferroelectric Memories (05/03/24)
Speaker and Affliation:
Prof. Asif Khan
School of Electrical and Computer Engineering and Materials Science and Engineering
Georgia Institute of Technology
When?
5th March, 2024 (Tuesday), 04.00 PM (India Standard Time)
Where
KPA Auditorium, Dept. of Materials Engineering, IISc, Bangalore
Abstract
The rise of artificial intelligence (AI)-driven marvels relies heavily on the continuous advancements in digital memory and storage technologies, particularly dynamic random-access memory (DRAM) and NAND flash. However, the trajectory of exponential improvements in these technologies is facing formidable challenges. In this talk, we will discuss the potential of the emerging ferroelectric technologies to upend the memory and storage landscapes. We will explore the prospects and challenges of using ferroelectrics to the transition from 2-D to 3-D in DRAM technology, as well as their role in facilitating vertical scaling in NAND technology, with the goal of achieving the 1000-layer milestone and beyond. We will also show that interface defects present an inevitable dilemma for FEFETs – trapped charges at the interfaces are crucial for facilitating low-voltage polarization switching. We will subsequently demonstrate that interface defects can be engineered to enhance FEFET performance. We will also delve into the outlook for ferroelectric-based embedded memories, which are particularly crucial for AI workloads.
About the Speaker
Asif Khan is an Associate Professor in the School of Electrical and Computer Engineering with a courtesy appointment in the School of Materials Science and Engineering at Georgia Institute of Technology. Dr. Khan’s research focuses on ferroelectric materials and devices to address the challenges faced by the semiconductor technology due to the end of transistor miniaturization. His work led to the first experimental proof-of-concept demonstration of the ferroelecric negative capacitance, which can reduce the power dissipation in transistors. His recent interest is understanding and demonstrating the fundamental limits of memory technologies concerning their scalability, density, capacity, performance, and reliability. His group publishes research on topics that include both logic and memory technologies, as well as artificial intelligence and neuromorphic hardware. Dr Khan’s notable awards include the DARPA Young Faculty Award (2021), the NSF CAREER award (2021), the Intel Rising Star award (2020), the Qualcomm Innovation Fellowship (2012), TSMC Outstanding Student Research Award (2011) and University Gold Medal from Bangladesh University of Engineering and Technology (2011). Dr. Khan received the Class of 1934 CIOS Honor Roll award for excellence in teaching a graduate course on Quantum Computing Devices and Hardware in Fall 2020. He is presently serving as an editor at IEEE Electron Device Letters. In the past, he has also worked as an associate editor for IEEE Access, and as a technical program committee member for various conferences including IEEE International Electron Devices Meeting (IEDM) and Design Automation Conference (DAC), among others.