PhD Thesis Defence: Mr. Sandeep Kumar Mondal (06/12/24)
Thesis title:
Inkjet-printed transistors and circuits with two-dimensional semiconductors
Faculty advisor(s):
Prof. Subho Dasgupta
When?
06th December, 2024 (Friday), 03:00 PM (India Standard Time)
Where
KPA Auditorium, Dept of Materials Engineering
Abstract
The escalating demand for wearables and large-area electronics has underscored the critical necessity for pioneering semiconducting materials. While organic semiconductors offer flexibility and processability at lower temperatures, their performance and ambient stability is generally constrained. The other explored material class - oxide semiconductors, is limited by their high processing temperatures. In contrast, inorganic two-dimensional (2D) materials exhibit properties conducive to the next generation of large-area and flexible devices, including appropriate band gaps, intrinsic flexibility, and the availability of both n-type and p-type semiconductors.
Various techniques exist for the large-scale synthesis of 2D materials, with chemical and physical vapor deposition imposing substrate limitations due to high required temperatures. Conversely, solution-based techniques provide substrate flexibility by operating at lower temperatures and obviate the need for high vacuum systems. When integrated with printing, solution-based techniques can allow roll-to-roll processing of inexpensive electronic devices through which disposable electronics can be realized.
Pointing out the advantages mentioned above, several groups have attempted to build transistors with solution-processed two-dimensional semiconductors. These reports demonstrate network transistors built with semiconductors from Group VI TMD, such as MoS2, WS2, MoSe2, etc. In a solution-processed film, there is a network of flakes, and the transport of charge carriers takes place through a lot of flakes and the respective inter-flake junctions. These inter-flake junctions introduce many non-tunable resistors and, as a result, control the overall electrical properties of the cast film. Due to this reason, it is difficult to take advantage of the intrinsic properties of solution-processed 2D semiconductors that are shown with the devices fabricated on single flakes. As a result, the attempts to build transistors on solution-processed flakes fall short of those built on single flakes of these devices. The films were made thicker in the initial reports to overcome the high inter-flake resistance and improve their conductance. However, the thicker semiconductor leads to poor dielectric control of the semiconducting films, resulting in much reduced On-Off ratios. Later, the occurrence of junctions is reduced by utilizing larger flakes. The larger flakes resulted in better transistor performance, but the larger size limits their fabrication through digital techniques such as inkjet printing. Another attempt is made where the flakes are covalently bonded to each other through diothiolated conjugated molecules. These improve the percolation pathway for flakes; however, the improvement in transistor properties was not substantial.
This report addresses the bottleneck of junction resistance by presenting several methods to achieve high-performance 2D transistors and circuits. Firstly, an innovative device geometry is proposed to transform the conduction to the vertical dimension of the film, which is several tens of nanometers, instead of conduction laterally, which is several tens of micrometers. As a result, the transport is now not limited by inter-flake junctions; instead, we observe intra-flake properties. High-performance n-type transistors of MoS2 exfoliated through several techniques are fabricated utilizing this geometry. The MoS2 transistors built with this geometry demonstrate a high reproducibility with a current density of 300 μA.μm-1 and an On-Off ratio of 107. Enjoying the high-performance transistors, we have shown inverters and several logic gates such as NAND, NOR, AND, and OR. The respective DC and AC performance has been analyzed. A maximum gain of 31 is demonstrated at a supply voltage of 1.5 V, and all the circuits are shown to operate at 1 kHz. In the next section, we built high-performance p-type transistors with solution-processed tellurium and a similar geometry. Then, the n-type MOS2 and p-type tellurium are used to make CMOS inverters.
In the next approach we approached the problem by inducing partial metallicity on the flakes. For this we took pre-doped MoS2 single crystals. These crystals are then electrochemically exfoliated and dispersed in solution. The partial metallic phase on these flakes is found to lower the junction resistance substantially, and transistors with channel lengths as high as 150 μm are demonstrated. Interestingly, the metallic nature does not increase the off current in transistors, and we observe a high On-Off ratio of 107. Moreover, we also observe a high current density of 280 μA.μm-1. These transistors could be fabricated at room temperature giving us an opportunity to build the devices on flexible substrates. Subsequently, we built fully printed devices on paper substrates with screen printed MXenes as the drive electrodes. In summary, in this work, we have emphasized the importance of junction resistance on the transistor properties of solution-processed 2D semiconductors. We have provided solutions to overcome the junction resistance and demonstrated high-performance devices.