PhD Thesis Colloquium: Mr. Sandeep Kumar Mondal (05/12/23)
Thesis title:
Fully-printed field-effect transistors and circuits from two-dimensional semiconductors: novel approaches to mitigate large inter-flake resistance in solution-processed devices
Faculty advisor(s):
Prof. Subho Dasgupta
When?
05th December, 2023 (Tuesday), 3:00 PM (India Standard Time)
Where
KI Vasu Auditorium, Department of Materials Engineering
Abstract:
The escalating demand for wearables and large-area electronics has underscored the critical necessity for pioneering semiconducting materials. While organic semiconductors offer flexibility and processability at lower temperatures, their performance and air stability are typically limited. In contrast, inorganic two-dimensional (2D) materials exhibit properties conducive to the next generation large-area and flexible devices, including appropriate band gaps, intrinsic flexibility, and the availability of both n-type and p-type semiconductors.
Various techniques exist for the large-scale synthesis of 2D materials, with chemical and physical vapor deposition imposing substrate limitations, due to high process temperatures required. Conversely, solution-based techniques provide substrate flexibility with the process temperature being generally low. When integrated with printing, solution-based techniques can allow roll-to-roll processing of electronic devices through which we can even realize disposable electronics.
With the above motivation, there are several reports on solution processed transition metal dichalcogenide (TMD, such as MoS2, WS2 etc.) transistors. However, the performance falls short because of the presence of inter-flake resistance between the flakes. The inter-flake junction is an integral part of thin films deposited from solution-processed two-dimensional materials. It is characterized by very poor electronic transport, which is not tunable electrostatically. This resistance ends up determining the device properties rather than the intrinsic properties of the semiconducting material itself.
In this regard, this dissertation work addresses this bottleneck by presenting methods to achieve high-performance 2D transistors and circuits. The first chapter introduces an innovative device geometry that can convert inter-flake transport to predominantly intra-flake, utilizing a near-vertical device architecture. Hence, instead of having charge transport along the printed semiconductor film laterally, we observe nearvertical carrier transport through the semiconductor film, drastically reducing the number of junctions, which makes the device performance close to that of the single-flake device. Inkjet-printed n-type MoS2 transistors, utilizing this geometry, achieve a high electron current density of 300 μA.μm-1 and an On-Off ratio of 106. Interestingly, we have also observed gate tunable capacitance modulation, which results in subthermionic transport and a low subthreshold swing of 7.5 mV.decade-1.
In the second chapter, exploiting the predominant intra-flake transport, we fabricate logic circuits from printed 2D transistors. Initially, unipolar depletion-mode inverters are shown with a maximum gain of 31 and dynamic power consumption below 15 nW. Next, we also demonstrate NOR, AND, NAND, and OR gates operating at 1 kHz. Moreover, we show the possibility of doping and contact resistance modulation in the printed devices, which are otherwise not conceivable in the presence of inter-flake resistance limited devices.
In the third chapter, by capitalizing on the novel device architecture, we fabricate complementary metal-oxide semiconductor (CMOS) circuits. The first target was to realize p-type 2D transistors, for which we utilized mono elemental Te as the semiconductor material. Here, we have achieved a high current density of 100 μA.μm-1, maintaining an On-Off ratio of 105. These p-type transistors, along with n-type MoS2 transistors, are then used to fabricate CMOS transistors. We could show a maximum gain of 11 at a mere supply voltage of 1.5 V. Also, it is shown to respond rail-to-rail at an AC input frequency of 1 kHz.
In the fourth and last chapter, we exploit the 1T metallic and 2H semiconducting polymorph of MoS2 to show high-performance devices in a lateral geometry itself. By inducing a metallic nature in the semiconducting flakes, we demonstrate it is possible to outdo the inter-flake resistance in a printed film when most of the flakes are metallic in nature, where the transport is controlled by the semiconducting flakes placed in between. Fascinatingly, we could show devices that can be fabricated at room temperature without needing surface treatment. In this chapter, we show fully-printed thin fil,m transistors (TFTs) on a paper substrate utilizing screen-printed 2D Mxene, Ti3C2 as the metal electrodes, and inkjet printed MoS2 as the semiconductor material. This work demonstrates that it is possible to fabricate fully-printed high performance electronics with 2D materials.