PhD Thesis Colloquium: Mr. Jyoti Ranjan Pradhan (09/05/23)

Thesis title:

Inkjet-printed high performance oxide electronics and its application at sensor interface

Faculty advisor(s):

Prof. Subho Das Gupta

When?

9^th May, 2023 (Tuesday), 2:00 PM (India Standard Time)

Where

K I Vasu Auditorium [Lecture Theatre], Department of Materials Engineering

Abstract:

Printed electronics is a rapidly maturing field of research, where printed, high throughput fabrication of electronic devices/ components on various rigid/ flexible substrates are aimed at. Over the last two decades, printing of oxide semiconductors has attracted particular attention for their possible applications in a variety of application domain, such as, sensors, thin film transistors (TFTs) and circuits, photodetectors, photovoltaics etc. Although oxide semiconductors can be very attractive choice, however, fully-printed circuits based on oxide semiconductors have rarely been reported in the literature; one of the major challenge here is the absence of a performance-matched high mobility p-type (hole conducting) oxide semiconductor. In this regard, in this PhD dissertation, the performance and capacity of printed all-NMOS unipolar pseudo-CMOS technology based circuits are evaluated.
At first, the deep subthreshold regime of amorphous indium-gallium zinc oxide (a-IGZO) TFTs has been exploited to fabricate pseudo-CMOS inverters, ring oscillators and static random access memories (SRAMs). In this case, a composite solid polymer electrolyte (CSPE) has been used as the gate insulator and the individual a-IGZO TFTs have resulted in superior device mobility values. The fabricated pseudo-CMOS design 2T-depletion type and 4T-depletion type inverters thus produced have demonstrated an unprecedented voltage gain (Av) of 284 and 325, respectively, at very low operating voltage of 2 V. On the other hand, single inverters and ring oscillators have also been tested for AC performance and found to demonstrate a switching speed up to 30 kHz. Next, even when based on pseudo-CMOS technology, the inverters have shown low static power consumption in the range of few hundreds of nanowatts. While the observed results are significantly superior when compared to the state of the art in printed electronics, it also paves way for many applications in the portable, wearable electronics domain, including interface circuits for sensors, displays etc. Next, fully-printed and further complex circuit elements have been planned and realized using an identical low voltage operated, electrolyte-gated and a-IGZO based deep sub-threshold operable TFT technology. The TFTs have been further optimized to demonstrate remarkably high ON/OFF current ratio as well as low subthreshold slope near to Boltzmann’s limit (58 mV/decade) at room temperature, which is necessary for the detection of weak biological/electrophysiological signals that are in the µV range. Here, at first, the fabricated pseudo-CMOS inverters with high voltage gain and noise margin are used to fabricate common-source and differential amplifiers that can amplify a small signal (mV range) to a large signal (Volt range) within a suitable frequency range up to 1 kHz. Next, fully-printed circuits consisting of amplifiers along with analog-to-digital converters (ADCs) have been realized that can interface with sensors and show the analog to digital conversion of the input analog signal. Moreover, the entire circuit is found capable of operating at a low supply voltage of ≤ 2 V, and can be used for fully-printed sensor patches along with readout electronics to detect physical, chemical or biological signals.
Finally, an effort has been made to improve further important/ key parameters of a TFT such as transconductance and subthreshold slope, a new device concept, known as negative capacitance field-effect transistor (nc-FET) has been realized. This device concept follows completely different device architecture from conventional MOSFETs, where the gate insulator becomes a combination of dielectric and a ferroelectric layer placed in a series. With this combination, the negative differential capacitance behaviour of a ferroelectric-gated TFT can be stabilized over a large frequency range. The concepts works similar to a step-up transformer placed inside the device that can result in a rate of change of semiconductor surface potential to be higher than the change in the applied gate potential, i.e. the body factor (m) of the transistor to be less than 1 (m< 1). This can translate to the sub-threshold slope of the device to be substantially less than the Boltzmann’s limit (58 mV/decade) at room temperature. With this device geometry, the TFTs can perform way superior in terms of rapid switching, which would translate to enormous signal gain (η). The total dynamic power consumption should also reduce drastically even when all-NMOS unipolar logic is used. While, the nc-FET device concept is novel and largely interesting, it has never been reported till date for fully solution-processed or printed transistors. In this regard, fully printed nc-FETs could have been demonstrated combining printed a-IGZO semiconductor channel, Al2O3 as the dielectric PVDF-TrFE (70/30) as the ferroelectric layer. The printed devices have shown truly metal-insulator type transition with subthreshold slope of 2.3 mV/dec. while the printed depletion-load type inverters have demonstrated gigantic signal gain, as large as η= 2691, along with a few nanowatts (nW) of dynamic power consumption. Interestingly, the nc-FETs have also exhibited memory behaviour with capacity of holding the state of the device for up to 106 seconds.